industrial temperature range IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs 1 j u ly 2 0 1 8 i n du st ri al t em perat u re ran ge idt and the idt logo is a registered trademark of integrated device technology, inc. feat u res: 0.5 micron cmos technology typical t sk(o) (output skew) < 250ps esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) v cca = 2.7v to 3.6v v ccb = 5v 0.5v cmos power levels (0.4 w typ. static) rail-to-rail output swing for increased noise margin available in ssop and tssop packages fu n ct i on al block di agram dri v e feat u res: high output drivers: 24ma suitable for heavy loads appli cat i on s: mixed 3.3v and 5v high speed systems 5v pci interface to 3.3v pc bus structures telecommunication legacy systems with transitions from 5v to 3.3v IDT74ALVC164245 cmos 16-bit 3.3vto 5v level shifting transceiver with 3-state outputs descri pt i on : this 16-bit 3.3v to 5v level shifting transceiver is manufactured using advanced dual metal cmos technology. the alvc164245 contains twoseparate supply rails; b port has v ccb , which is set at 5v, and a port has v cca , which is set to operate at 3.3v. this allows for translation from a 3.3v to 5v environment and vice-versa. this device is designed for asynchro-nous communication between data buses. the alvc164245 has been designed with a 24ma output driver. this driver is capable of driving a moderate to heavy load while maintainingspeed performance. 1 dir 1 a 1 1 a 2 1 a 3 1 a 4 1 a 5 1 a 6 1 a 7 1 a 8 1 b 8 1 b 7 1 b 6 1 b 5 1 b 4 1 b 3 1 b 2 1 b 1 1 oe 2 dir 2 a 1 2 a 2 2 a 3 2 a 4 2 a 5 2 a 6 2 a 7 2 a 8 2 b 8 2 b 7 2 b 6 2 b 5 2 b 4 2 b 3 2 b 2 2 b 1 2 oe 1 47 46 4443 4140 38 37 12 11 9 8 6 5 3 2 48 2436 3533 32 30 29 27 26 23 22 20 19 17 16 14 13 25 3.3v port 5v port 3.3v port 5v port ? 2018 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. dsc -4477/10
industrial temperature range 2 IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs pi n con fi gu rat i on note: 1. as applicable to the device type. capaci tan ce (t a = +25c, f = 1.0mhz, v cca = 3.3v) symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +6 v v term (3) terminal voltage with respect to gnd ?0.5 to +6 v t stg storage temperature ?65 to +150 c i out dc output current ?50 to +50 ma i ik continuous clamp current, 50 ma v i < 0 or v i > v cc i ok continuous clamp current, v o < 0 ?50 ma i cc continuous current through each 100 ma i ss v cc or gnd absolu t e m ax i m u m rat i n gs (1 ) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operationof the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. v cc terminals. 3. all terminals except v cc . 1 dir 1 b 1 gnd v ccb gnd 2 3 4 5 6 7 8 9 1011 12 13 14 15 16 17 18 19 2021 22 23 24 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 40 41 42 43 44 45 46 47 48 1 1 b 2 1 b 3 1 b 4 1 b 5 1 b 6 1 b 7 1 b 8 2 b 1 2 b 2 gnd 2 b 3 2 b 4 2 b 6 2 b 5 v ccb gnd 2 b 8 2 b 7 2 dir 1 oe 1 a 1 gnd v cca gnd 1 a 2 1 a 3 1 a 4 1 a 5 1 a 6 1 a 7 1 a 8 2 a 1 2 a 2 gnd 2 a 3 2 a 4 2 a 6 2 a 5 v cca gnd 2 a 8 2 a 7 2 oe (5v) (5v) (3.3v)(3.3v) note: 1. as applicable to the device type. capaci tan ce (t a = +25c, f = 1.0mhz, v ccb = 5v) note: 1. h = high voltage level l = low voltage levelx = don?t care z = high impedance fu n ct i on table (each 8-bit section) (1 ) inputs xoe xdir outputs l l bus b data to bus a l h bus a data to bus b h x high z state pin names description xoe (1) output enable inputs (active low) xdir (1) direction output controls x a x port a inputs or 3-state outputs x b x port b inputs or 3-state outputs pi n descri pt i on symbol parameter (1) conditions typ. max. unit c in a port input capacitance v in = 0v 6.5 ? pf c i/o a port i/o capacitance v in = 0v 8.5 ? pf symbol parameter (1) conditions typ. max. unit c in b port input capacitance v in = 0v 6.5 ? pf c i/o b port i/o capacitance v in = 0v 6.5 ? pf note: 1. all control inputs are powered off v cca . top view package type package code order code tssop pag48 pag ssop pvg48 pvg
industrial temperature range IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs 3 dc elect ri cal ch aract eri st i cs ov er operat i n g ran ge (b port ) (1 ) following conditions apply unless otherwise specified:operating condition: t a = ?40c to +85c dc elect ri cal ch aract eri st i cs ov er operat i n g ran ge (a port ) (1 ,2 ) following conditions apply unless otherwise specified:operating condition: t a = ?40c to +85c symbol par ameter test conditions min. typ. (2) max. unit v ih input high voltage level v ccb = 4.5v to 5.5v 2 ? ? v v il input low voltage level v ccb = 4.5v to 5.5v ? ? 0.8 v i ih input high current v ccb = 5.5v v i = v cc ?? 5 a i il input low current v ccb = 5.5v v i = gnd ? ? 5 a i ozh high impedance output current v ccb = 5.5v v o = v cc ?? 10 a i ozl (3-state output pins) v o = gnd ? ? 10 v h input hysteresis v ccb = 4.5v ? 100 ? mv i ccl quiescent power supply current v ccb = 5.5v ? 0.1 40 a i cch v in = gnd or v ccb i ccz i cc quiescent power supply current one input at 3.4v, other inputs at v ccb or gnd ? ? 750 a variation notes: 1. v cca = 2.7v to 3.6v. 2. typical values are at v cc = 5v, +25c ambient. symbol par ameter test conditions min. typ. (3) max. unit v ih input high voltage level v cca = 2.7v to 3.6v 2 ? ? v v il input low voltage level v cca = 2.7v to 3.6v ? ? 0.8 v i ih input high current v cca = 3.6v v i = v cc ?? 5 a i il input low current v cca = 3.6v v i = gnd ? ? 5 a i ozh high impedance output current v cca = 3.6v v o = v cc ?? 10 a i ozl (3-state output pins) v o = gnd ? ? 10 v h input hysteresis v cca = 3.3v ? 100 ? mv i ccl quiescent power supply current v cca = 3.6v ? 0.1 40 a i cch v in = gnd or v cca i ccz i cc quiescent power supply current one input at v cca - 0.6v, other inputs at v cca or gnd ? ? 750 a variation notes: 1. v ccb = 5v 0.5v. 2. control inputs xdir, oe are supplied from v cca . 3. typical values are at v cc = 3.3v, +25c ambient.
industrial temperature range 4 IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs note: 1. v ih and v il must be within the min. or max. range shown in the dc electrical characteristics over operating range table for the appropriate v cc range. t a = ? 40c to + 85c; v cca = 3.3v 0.3v. ou t pu t dri v e ch aract eri st i cs, v cca = 3 .3 v 0 .3 v (a port ) symbol parameter test conditions (1) min. max. unit v oh output high voltage v cca = 2.7v to 3.6v i oh = ? 0.1ma v cca ? 0.2 ? v (b port to a port) v cca = 2.7v i oh = ? 12ma 2.2 ? v cca = 3v 2.4 ? v cca = 3v i oh = ? 24ma 2 ? v ol output low voltage v cca = 2.7v to 3.6v i ol = 0.1ma ? 0.2 v (b port to a port) v cca = 2.7v i ol = 12ma ? 0.4 v cca = 3v i ol = 24ma ? 0.55 note: 1. v ih and v il must be within the min. or max. range shown in the dc electrical characteristics over operating range table for the appropriate v cc range. t a = ? 40c to + 85c; v ccb = 5v 0.5v. ou t pu t dri v e ch aract eri st i cs, v ccb = 5 v 0 .5 v (b port ) symbol parameter test conditions (1) min. max. unit v oh output high voltage v ccb = 4.5v i oh = ? 0.1ma 4.3 ? v (a port to b port) v ccb = 5.5v 5.3 ? v ccb = 4.5v i oh = ? 24ma 3.7 ? v ccb = 5.5v 4.7 ? v ol output low voltage v ccb = 4.5v i ol = 0.1ma ? 0.2 v ((a port to b port) v ccb = 5.5v ? 0.2 v ccb = 4.5v i ol = 24ma ? 0.55 v ccb = 5.5v ? 0.55
industrial temperature range IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs 5 swi tch i n g ch aract eri st i cs (1 ) v ccb = 5v 0.5v v cca = 2.7v v cca = 3.3v 0.3v symbol parameter min. max. min. max. unit t plh propagation delay 5.9 1 5.8 ns t phl xax to xbx t plh propagation delay 6.7 1.2 5.8 ns t phl xbx to xax t pzh output enable time 9.3 1 8.9 ns t pzl xoe to xbx t pzh output enable time 10.2 2 9.1 ns t pzl xoe to xax t phz output disable time 9.2 2.1 9.4 ns t plz xoe to xbx t phz output disable time 9 2.9 8.6 ns t plz xoe to xax note: 1. see test circuits and waveforms. t a = ? 40c to + 85c. operat i n g ch aract eri st i cs, t a = 2 5 c v cca = 3.3v, v ccb = 5v symbol parameter test conditions typical unit c pd power dissipation capacitance, outputs enabled (a port or b port) c l = 0pf, f = 10mhz 56 pf c pd power dissipation capacitance, outputs disabled (a port or b port) 6
industrial temperature range 6 IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs open v load gnd v cc pulse generator d.u.t. 500 500 c l r t v in v out (1, 2) alvc link same phase input transition opposite phase input transition 0v0v v oh v ol t plh t phl t phl t plh output v ih v t v t v ih v t alvc link control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v ol + v lz v oh v t v t t pzl v load/2 v load/2 v ih v t v ol v oh - v hz alvc link propagation delay test circuit for all outputs enable and disable times definitions:c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. note: 1. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. note:1. diagram shown for input control enable-low and input control disable-high. symbol v cca = 3.3v0.3v v cca = 2.7v unit v load 66 v v ih 33 v v t 1.5 1.5 v v lz 300 300 mv v oh - v hz 300 300 mv c l 50 50 pf t est con di t i on s swi tch posi t i on test switch disable low v load enable low disable high gnd enable high all other tests open t est ci rcu i t s an d wav eform s for v cca = 3 .3 v 0 .3 v an d v cca = 2 .7 v
industrial temperature range IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs 7 same phase input transition opposite phase input transition 0v0v v oh v ol t plh t phl t phl t plh output v ih v t v ccb / 2 v ih v ccb / 2 control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v lz v oh v ccb / 2 v ccb / 2 t pzl v load/2 v load/2 v ih v t v ol v hz propagation delay enable and disable times notes:1. for t sk (o) output1 and output2 are any two outputs. 2. for t sk (b) output1 and output2 are in the same bank. note:1. diagram shown for input control enable-low and input control disable-high. symbol v ccb (1) = 5v0.2v unit v load 2 x v ccb v v ih 2.7 v v t 1.5 or v ccb / 2 v v lz 20% of v ccb mv v hz 80% of v ccb mv c l 50 pf t est con di t i on s (use v cca test circuit) note: 1. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. t est ci rcu i t s an d wav eform s for v ccb = 5 v 0 .5 v
industrial temperature range 8 IDT74ALVC16424516-bit 3.3v to 5v level shifting transceiver with 3-state outputs orderi n g i n form at i on xx alvc xxx xx package device type temp. range pvgpag 164 74 shrink small outline package - greenthin shrink small outline package - green 16-bit 3.3v to 5v level shifting transceiverwith 3-state outputs ? 40c to +85c xx x family bus-hold 245 no bus-hold double-density, 24ma blank blank 8 tubetape and reel x corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or 408-284-8200 logichelp@idt.com san jose, ca 95138 fax: 408-284-2775 www.idt.com dat a she e t doc um e nt h ist or y 07/30/2018 pg. 2, 8 added table under pin configuration diagram with detailed package information. updated the ordering informationdiagram adding tube, tape and reel. added new table of orderable part information. orde ra ble pa r t i nfor m a t ion speed (ns) orderable part id pkg. code pkg. type temp. grade 74alvc164245pag pag48 tssop c 74alvc164245pag8 pag48 tssop c 74alvc164245pvg pvg48 ssop c 74alvc164245pvg8 pvg48 ssop c
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